Posts mit dem Label EZ-USB werden angezeigt. Alle Posts anzeigen
Posts mit dem Label EZ-USB werden angezeigt. Alle Posts anzeigen

Sonntag, 23. September 2012

libusb 1.0 for Pascal

This is a follow-up post to LibUSB for Pascal on 2012-07-15. I've now added header translations for the newer version libusb 1.0 (as well as its fork libusbx) including an object-oriented wrapper and a few examples to be used with Pascal.

Please find the source code in the libusb-1.0 branch at https://github.com/hansiglaser/pas-libusb.

Montag, 16. Juli 2012

Control and communicate with a Cypress EZ-USB

When developing a device with the Cypress EZ-USB AN2131 microcontroller, eztool might come in handy. It is a command line tool to control and to communicate with these microcontrollers via USB. It can also communicate to any USB device in a custom user mode.

eztool offers a convenient command line interface. It uses Tcl as scripting language and command interpreter. Actually, every command you enter is implemented as a Tcl command (but written in Pascal and compiled in the executable). The Tcl programming language offers unlimited options to use, customize and automate eztool.

eztool prints a prompt at the screen which signals the current mode. To wait for the user input, GNU Readline is used. This offers comforable command line editing, history and auto-completion.

For each Tcl command and variable a dedicated manual page is provided.

Please find the source code at https://github.com/hansiglaser/eztool. It uses the Pascal OOP wrappers for GNU Readline, Tcl and LibUSB. Its device firmware is based on the EZ-USB firmware template.

Sonntag, 15. Juli 2012

EZ-USB Firmware Skeleton

Back in 2002 I developed my first evaluation board with the Cypress EZ-USB AN2131 microcontroller. Since then I developed several projects using this microcontroller. Each time a dedicated firmware was necessary.

In 2011 a student used one of my firmware projects to develop a firmware for the Keil ULink JTAG adapter, which also has an EZ-USB microcontroller. Unfortunately my firmware had a few files with unclear license conditions, so he re-implemented most files. His work was published as OpenULINK as part of the OpenOCD JTAG driver.

I used his improved firmware as starting point for the development of a firmware skeleton for the Cypress EZ-USB microcontroller. Please find the source code at https://github.com/hansiglaser/ezusb-firmware.

LibUSB for Pascal

libusb is a C library that gives applications easy access to USB devices. Many of my previous projects involving USB devices (e.g. the EZ-USB breakout board) use the libusb to communicate with it from the PC.

Since libusb is implemented in (plain) C, its headers had to be translated to be used with Pascal. I've also added an object-oriented wrapper. Please find the source code at https://github.com/hansiglaser/pas-libusb.

Donnerstag, 31. Mai 2012

k7103-USB

Several years ago I wrote a GUI frontend for the Velleman k7103 PC Storage Oscilloscope.

K7103 picture          K7103 Frontend

The DSO is connected to the PC with a parallel printer cable. Most modern PCs don't have this interface any more. USB to Parallel converter cables don't work as interface because special control signals are used by k7103.

Therefore I developed a USB interface for k7103. k7103-USB is a dedicated interface with direct connection to the internal signals of the k7103. It offers all features of k7103 as available with the parallel printer cable. Additionally, an increased bandwidth for the data transfer of the sampling RAM to the PC is achieved. The K7103 frontend is extended with an appropriate driver for the new USB interface. It achieves approx. 70 acquisitions per second at my Core-i7 at 2.8GHz.

An additional PCB (100x76mm) is inserted into the k7103 case and connects to several digital chips of the k7103 PCB. k7103-USB mainly contains a Cypress AN2131Q EZ-USB 8051 microcontroller (MCU) and a Xilinx XC9572-PC84 CPLD.

Find more information on the GUI frontend and the k7103-USB hardware at http://k7103.sourceforge.net/.

Montag, 2. Mai 2011

Keil ULink

Some time ago I've investigated the Keil ULink JTAG adapter. Note that this is version 1, not the ULink2, ULinkPro or ULink-ME. The following image shows the schematic (the link opens a PDF file), previously posted at Mikrocontroller.net.



The device is built around the well-known Cypress AN2131 EZ-USB microcontroller and has additional 32 kByte external memory. Level shifters are used for the JTAG signals, which are available at 3 connectors for Infineon OCDS, ST and ARM.

Since the device is quite generic, any other things can be done with it. A few students used it to program their custom firmware and PC software (running on Linux) to use the device to download ATmega and ARM software as well as an OpenOCD driver. Links and details will follow.

Unfortunately the work is only tested with the ULink version 1. Does anybody have a ULink2 and is interested to borrow it to us for investigations and firmware adoption?

Sonntag, 1. Mai 2011

Logic Analyzer and Protocol Analyzer

The Logic Analyzer and Protocol Analyzer is a project done during Easter holidays. It uses an FPGA for acquisition, then transfers the samples to the PC, where a protocol analyzer identifies the ones and zeros and reconstructs e.g. I2C bus traffic or a program download and debug session via JTAG.


Several years ago I got a Cesys X2S_USB FPGA board with a Xilinx Spartan-2 XC2S200-PQ208 FPGA and an AN2131 EZ-USB microcontroller (MCU). The MCU has rich connectivity to the FPGA and is used for programming and control, both via the PC.



The first image shows the X2S_USB and an add-on board with multiple pin-head connectors. Each size is available twice to connect this board as sniffer to a ribbon cable. One cable comes e.g. from a JTAG programmer and the second goes to the target device. No intermediate connector at ribbon cables are required this way.

Logic Analyzer

The Logic Analyzer part is mainly implemented in the FPGA. Commercial logic analyzers sample the input signals periodically. Either an internal clock is used (like a digital scope) or a dedicated input signal is used as clock. This projects realizes a different approach: The logic signals are only stored, if any of them has changed. This looses time information, but instead spares the small amount of acquisition memory.

For each input signal one of the 4kBit Block RAMs is used. The FPGA contains 14 such Block RAMs, therefore up to 14 signals can be monitored with up to 4096 values.


Before the operation can start, the MCU is used to download the config bitstream (167 kBytes) from the PC via the USB bus into the FPGA. For the operation, the FPGA is connected to the EZ-USB via the 8 bit external memory interface. The MCU can access a control register and a sample counter as well as a FIFO to read out the acquisition memory.

Everything is controlled with a small PC program, which communicates with the MCU via USB.

Protocol Analyzer

The protocol analyzer functionality uses the samples acquired by the logic analyzer and applies analysis algorithms. Successive algorithms hierarchically extract the meaning from the data. The first step is to convert the samples to protocol-specific symbols, e.g. I2C-Start, -Stop or -Data. The next levels extract the meaning of these symbols with a notion of underlying grammar, e.g. I2C Byte or a whole I2C Transfer.

Currently only I2C analysis is done. The output is printed as text, so no fancy GUI or waveforms. Next steps will be a more user-friendly interface with Readline and perhaps a scripting language. This will be supplemented with a GUI and finally with waveforms.

Eagle, VHDL, Firmware and PC software sources are available under the terms of the GPL on request.

Mittwoch, 27. April 2011

EZ-USB AN2131 External Memory Timing

The EZ-USB Technical Reference Manual of the AN2131 and friends shows that all external memory read and write strobe signals are active (low) for two CLK24 cycles (see Fig. 13-1 to 13-4). Important: That this is only true if the wait states are disabled as described in Sec. B.2.2.

After reset the default is one wait state which extends the strobe signals to four CLK24 cycles.

 
Bits 0 to 2 of the SFR CKCON have to be set to 0 explicitly for zero wait states with a strobe width of two.

Dienstag, 19. April 2011

EZ-USB Breakout Board

The Cypress (former Anchor Chip) AN2131 EZ-USB microcontroller contains an improved 8051 plus a USB serial interface engine. The internal 8kByte RAM (Code, Data) can be written from a PC via the USB bus to download the firmware to the chip. Therefore no flash or other non-volatile memory is required. Firmware update is as easy as restarting the PC application.

My first project using the EZ-USB microcontroller was the "EZ1" test board in 2001 with two MAX521 8 channel DACs, a MAX127 8 channel 12 bit ADC (both with I²C interface), a RS232 connector and one for the Infineon FingerTip sensor as well as two LEDs. If you don't have JTAG for debugging, two LEDs is the absolute minimum to trace the program execution.

             

In the meantime I did several other projects using this microcontroller.

The EZ1 board lacks connections for general purpose digital signals (e.g. to control an OLED). Therefore a new board was required. Contrary to the EZ1 it holds the 80 pin version of the microcontroller. All signal pins are connected to pin sockets. Port A is also connected to eight LEDs (with a driver chip).


The new board already proved useful to control an OLED module (ELV ODM100). The image shows the display on the left and the EZ-USB breakout board on the right. The image on the display is only shown partly due to the short exposure time of the camera. The ribbon cable is used to "convert" the pins of the display module to sockets which can be connected with stripped wires to the breakout board (colored wires). ELV offers source code to access the OLED. Only a few changes were necessary to get it working for the 8051. More work helped to speed up the port access and therefore image setup.


Files: Schematic PDF, Eagle Schematic, Eagle Board